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us audio multiplexing decoder description the CXA2064M is an ic designed as a decoder for the zenith tv multi-channel system. functions include stereo demodulation, sap (separate audio program) demodulation, dbx noise reduction. features adjustment free of vco and filter. audio multiplexing decoder and dbx noise reduction decoder are all included in a single chip. almost any sort of signal processing is possible through this ic. various built-in filter circuits greatly reduce external parts. this ic is near pin to pin compatible with the cxa2020m. applications tv, vcr and other decoding systems for us audio multiplexing tv broadcasting structure bipolar silicon monolithic ic absolute maximum ratings (ta = 25?) supply voltage v cc 11 v operating temperature topr ?0 to +75 ? storage temperature tstg ?5 to +150 ? allowable power dissipation p d 1000 mw stid, sapid drive current i o 2 (max.) ma range of operating supply voltage 9 0.5 v ? this device is available only to the licensees of the dbx-tv noise reduction system. ?1 e98513a1z-ps sony reserves the right to change products and specifications without prior notice. this information does not convey any licens e by any implication or otherwise under any patents or other right. application circuits shown, if any, are typical examples illustr ating the operation of the devices. sony cannot assume responsibility for any problems arising out of the use of these circuits. CXA2064M 30 pin sop (plastic) standard i/o level input level compin (pin 7) 100mvrms (mono 100hz 100% mod.) output level tvout-l/r (pins 23 and 22) 490mvrms (mono 100hz 100% mod.) pin configuration (top view) stin 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 subout noisetc v cc iref gnd compin saptc vgr plint stid sapid pcint2 pcint1 mainout ve vewgt sapout sapin vetc veout vcain tvout-l tvout-r vcatc vcawgt mute m1 fomo mainin
2 CXA2064M block diagram 9 5 iref 11 12 detection mode_display noise det sapvco stind sapind bpf lpf lpf deem lpf lpf 1/2 1/4 vco lflt flt lpf lpf rmsdet vca ve deem amp (+4db) sw hpf matrix rmsdet 2 3 4 6 7 8 10 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 1 compin v cc gnd noisetc saptc vgr iref sapid stid fomo m1 mute sapout sapin stin ve vewgt vetc veout vcain vcawgt vcatc tvout-l tvout-r mainin mainout subout plint pcint2 pcint1 +6db
3 CXA2064M pin description (ta = 25 c, v cc = 9v) pin no. symbol pin voltage equivalent circuit description v cc subout stin noisetc 4.0v 4.0v 3.0v supply voltage pin. (l r) signal output pin. input the (l-r) signal from subout (pin 2). set the time constant for the noise detection circuit. (connect a 4.7f capacitor between this pin and gnd.) 4 2 1 sapin 4.0v input the (sap) signal from sapout (pin 28). 27 3 4 12k 4k 147 580 580 vcc 2 23k 147 18k 20k 11.7k 23k 4v 147 18k 4v v cc 27 1 3k 3k 3.3k 4k 4v vcc 8k 2 10k 1k 2k vcc 200k 3
4 CXA2064M pin no. symbol pin voltage eqivalent circuit description compin iref gnd 4.0v 1.3v audio multiplexing signal input pin. set the filter and vco reference current. (connect a 68k ? (1%) resistor between this pin and gnd.) analog block gnd. set the time constant for the sap carrier detection circuit. (connect a 4.7f capacitor between this pin and gnd.) 7 5 6 saptc 4.5v 8 v cc 24k 4v 50k 147 24k 24k 7 8k 4k 3k 10k v cc 50 1k v cc 8 6 40k 40k 30k 30p 1.8k 16k 6.3k 147 34k 15k 30k v cc 2 v cc 5
CXA2064M 5 pin no. symbol pin voltage eqivalent circuit description plint 5.1v pilot cancel circuit loop filter integrating pin. (connect a 1f capacitor between this pin and gnd.) v cc 147 20k 26 20k 10k 20k 50 20k 20k 10 10 stid stereo detection pin. open collector output. drive current is 2ma (max.). 11 sapid sap detection pin. open collector output. drive current is 2ma (max.). 12 68k 10.5k 11 12 15k vgr 1.3v band gap reference output pin. (connect a 10f capacitor between this pin and gnd.) 9 4 11k 9.7k 19.4k 2.06k 3k 147 v cc 11k 11k 9
6 CXA2064M v cc 147 10k 47k 4v v cc 16 pin no. symbol pin voltage eqivalent circuit description mainin 4.0v input the (l + r) signal from mainout (pin 15). 16 mainout 4.0v (l + r) signal output pin. v cc 147 1k 15k 200 v cc 4 15 15 fomo mode control switch pin. this pin has 3 ranges for input voltage. sets forced monoral mode and also control st.id. 17 mute mode control switch pin. when this pin is set to h level, tvout output is muted. 19 50k 70k 10.5k 17 19 pcint1 pcint2 4.0v 4.0v stereo block pll loop filter integrating pin. 22k v cc 30k 147 14 4k v cc 2 10k 10k 2k 147 13 14 13
7 CXA2064M pin no. symbol pin voltage eqivalent circuit description vcatc 1.7v determine the restoration time constant of the vca control effective value detection circuit. (the specified restoration time constant can be obtained by connecting a 10f capacitor between this pin and gnd.) 21 50 v cc 4k 20k 4 4 7.5 21 tvout-r 4.0v tvout right channel output pin. 22 tvout-l 4.0v tvout left channel output pin. 23 3k 580 580 v cc 22 23 vcawgt 4.0v weight the vca control effective value detection circuit. (connect a 1f capacitor and a 3.9k ? resistor in series between this pin and gnd.) 20 4k v cc 30k 8k 36k 2.9v 3p 580 580 147 40k 40k 50 8 20 m1 mode control switch pin. this pin has 3 ranges for input voltage. stereo, both, sap selection are available. 18 10.5k 40k 18 24k 4v v cc 25k
8 CXA2064M pin no. symbol pin voltage eqivalent circuit description veout 4.0v variable de-emphasis output pin. (connect a 4.7f non-polar capacitor between pins 25 and 24.) 25 vcc 10k 580 580 5p 25 vetc 1.7v determine the restoration time constant of the variable de-rmphasis control effective value detection circuit. (the specified restoration time constant can be obtained by connecting a 3.3f capacitor between this pin and gnd.) 26 20k 7.5 4k 50 vcc 4 4 26 sapout 4.0v sap fm detector output pin. 28 24k 10 580 vcc 5p 580 4k 50 10k 147 28 vcain 4.0v vca input pin. input the variable de-emphasis output signal from pin 25 via a coupling capacitor. 24 v cc 20k v cc 47k 47k 24
9 CXA2064M pin no. symbol pin voltage eqivalent circuit description ve 4.0v variable de-emphasis integrating pin. (connect a 2700pf capacitor and a 3.3k ? resistor in series between this pin and gnd.) 30 7.5k 147 v cc 30 vewgt 4.0v weight the variable de-emphasis control effective value detection circuit. (connect a 0.047f capacitor and a 3k ? resistor in series between this pin and gnd.) 29 vcc 4v 36k 2.9v 580 147 580 8k 30k 8 4k 50 29
10 CXA2064M electrical characteristics compin input level (100% modulation level) (ta = 25 c, v cc = 9v) current consumption main output level main de-emphasis frequency characteristic main lpf frequency characteristic main distortion main overload distortion main s/n sub output level sub lpf frequency characteristic sub distortion sub overload distortion sub s/n st sap crosstalk sub pilot leak 1 2 3 4 5 6 7 8 9 10 11 12 13 14 icc vmain fcdeem fcmain thdm thdmmax snmain vsub fcsub thdsub thdsmax snsub ctst pcsub mono mono mono mono mono mono st st st st st sap st 7 7 7 7 7 7 7 7 7 7 7 7 7 15 440 1.2 3.0 61 225 3.0 56 60 23 490 0 1.0 0.1 0.15 69 275 0.5 0.1 0.2 64 70 27 31 540 1.0 1.0 0.5 0.5 325 1.0 1.0 2.0 16 ma mvrms db db % % db mvrms db % % db db db no signal mono 1khz 100% mod. pre-em. on mono 5khz 30% mod. pre-em. on mono 12khz 30% mod. pre-em. on mono 1khz 100% mod. pre-em. on mono 1khz 200% mod. pre-em. on mono 1khz, pre-em. on sub (l-r) 1khz, 100% mod., nr off sub (l-r) 12khz, 30% mod., nr off sub (l-r) 1khz, 100% mod., nr off sub (l-r) 1khz, 200% mod., nr off sub (l-r) 1khz, nr off sub (l-r) 1khz, 100% mod., nr on, sap carrier (5f h ) pilot (f h ) 0db 20 log ('5k'/'1k') 20 log ('12k'/'1k') 20 log ('100%'/'0%') 20 log ('12k'/'1k') 20 log ('100%'/'0%') 20 log ('m1 = l'/ 'm1 = h') 0db = 20mvrms 15klpf 15klpf 15klpf 15klpf 15klpf 15klpf 1kbpf f h bpf 22/23 22/23 22/23 22/23 22/23 22/23 2 2 2 2 2 23 2 main (l + r) (pre-emphasis: off) = 100mvrms sub (l r) (dbx-tv: off) = 200mvrms pilot= 20mvrms sap carrier= 60mvrms f h = 15.734khz no. item signal mode input pin input signal measurement conditions filter output pin min. typ. max. unit
11 CXA2064M 15 16 17 18 19 20 21 22 23 24 25 26 27 stereo on level stereo on/off hysteresis sap output level sap lpf frequency characteristic sap distortion sap s/n sap st cross talk sap on level sap on/off hysteresis st separation 1 l r st separation 1 r l st separation 2 l r st separation 2 r l thst hyst vsap fcsap thdsap snsap ctsap thsap hysap stlsep1 strsep1 stlsep2 strsep2 sap sap sap sap st st st st st 7 7 7 7 7 7 7 7 7 9.0 2.0 130 3.0 46 60 12.0 2.0 23 23 23 23 6.0 6.0 170 0 2.5 55 70 9.0 4.0 35 35 35 35 3.0 10.0 210 2.5 6.0 6.5 6.0 db db mvrms db % db db db db db db db db sap 1khz 100% mod. nr off sap 10khz 30% mod . nr off sap 1khz 100% mod . nr off sap 1khz, nr off sap 1khz 100% mod. nr on, pilot (f h ) st-l 300hz 30% mod . nr on st-r 300hz 30% mod . nr on st-l 3khz 30% mod . nr on st-r 3khz 30% mod . nr on 0db = 20mvrms 20 log ( on level'/'off level') 20 log ('10k'/'1k') 20 log ('100%'/'0%') 20 log ('m1 = h'/ 'm1 = l') 0db = 60mvrms 20 log ( on level / off level ) 20 log ('lch'/'rch') 20 log ('rch'/'lch') 20 log ('lch'/'rch') 20 log ('rch'/'lch') 15klpf 15klpf 1kbpf 15klpf 15klpf 15klpf 15klpf 11 11 28 28 28 28 23 12 12 22/23 22/23 22/23 22/23 no. item signal mode input pin input signal measurement conditions filter output pin min. typ. max. unit st 7 change pilot (f h ) level change sap carrier (5f h ) level 7 sap
12 CXA2064M electrical characteristics measurement circuit r7 3.9k v3 2.5v v2 5v r2 68k gnd c5 10 r3 10k r4 10k c11 10 tanta- lum metal 1% c7 5600p r5 1meg r6 100k c8 0.012 c14 4.7 c17 0.047 r8 5k c18 2700p r9 3.3k c15 3.3 tanta- lum 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 stin subout noisetc v cc iref gnd compin saptc vgr plint stid sapid pcint2 pcint1 mainout ve vewgt sapout sapin vetc veout vcain tvout-l tvout-r vcatc vcawgt mute m1 fomo mainin c6 1 c4 4.7 c2 4.7 v1 9v c3 4.7 r1 10k c1 4.7 c9 4.7 c16 4.7 c19 4.7 att sg gnd s5 s6 s7 s8 buff filters 15khz lpf f h bpf 1khz bpf measures s9 s4 c12 4.7 s1 s2 s3 c13 4.7 v cc c10 1
13 CXA2064M adjustment method 1. input level adjustment 1) connect components as shown in fig. 1. 2) set the us mpx encoder output to mono 100hz 100% modulation. 3) adjust the "att" so that compin (pin 7) level goes to 100mvrms (0.5db). 2.separation adjustment 1) mode control pin are set to fomo (pin 17): l, m1 (pin 18): l, mute (pin 19): l. 2) set the us mpx encoder ouput to stereo lch-only 300hz 30% modulation, nr-on. then, adjust the variable resistor of subout (pin 2) to reduce the tvout-r output to the minimum. 3) next, set the frequency only of the input signal to 3khz and adjust the variable resistor of vewgt (pin 29) to reduce the tvout-r output to the minimum. 4) the adjustments in 2 and 3 above are performed to optimize the separation. us mpx encoder att CXA2064M 4.7 compin (pin 7) fig. 1. adjustment setup ? adjust this ic through tuner and if when this ic is mounted on the set.
14 CXA2064M description of operation the us audio multiplexing system possesses the base band spectrum shown in fig. 2. peak dev khz 50 25 25 l + r 50 15khz l-r dbx-tv nr 50 am-dsb-sc sap dbx-tv nr fm 10khz 50 10khz telemetry fm 3khz 15 f h = 15.734khz f h 2f h 3f h 4f h 5f h 6f h 6.5f h f 5 pilot 3 (compin) stereo lpf pll (vco 8f h ) 2f hl 0 f hl 90 f hl 0 st.id pilot det pilot cancel main lpf de.em (main out) l + r 4.7 (main in) l-r (dsb) det inj. lock sub lpf (subout) 4.7 nr sw dbx-tv block matrix mode control (sap in) 4.7 sap(fm) det sap lpf sap bpf (sap out) a b noise det mode control sap det sap.id 7 22 23 (tvout-l) (tvout-r) 27 28 2 15 16 10k mode control (stin) 1 nr sw fixed deemphasis variable deemphasis (ve out) (vca in) to matrix 4.7 hpf lpf lpf rms det rms det vca a b (st in) (sap in) 1 24 25 27 fig. 2. base band spectrum fig. 3. overall block diagram (see fig. 4 for the dbx-tv block) fig 4. dbx-tv block
15 CXA2064M (1) l + r (main) when the audio multiplexing signal is inputted to compin (pin 7), the sap signal and telemetry signal are suppressed by stereo lpf. next, the pilot signals are canceled. finally, the l r signal and sap signal are removed by main lpf, and frequency characteristics are flattened (de-emphasized) and input to the matrix. (2) l r (sub) the l r signal follows the same course as l + r before the pilot signal is canceled. l r has no carrier signal, as it is a suppressed-carrier double-sideband amplitude modulated signal (dsb-am modulated). for this reason, the pilot signal is used to regenerate the carrier signal (quasi-sine wave) to be used for the demodulation of the l r signal. in the last stage, the residual high frequency components are removed by sub lpf and the l r signal is input to the dbx-tv block via the nrsw circuit. (3) sap sap is an fm signal using 5f h as a carrier as shown in the fig. 2. first, the sap signal only is extracted using sap bpf. then, this is subjected to fm detection. finally, residual high frequency components are removed and frequency characteristics flattened using sap lpf, and the sap signal is input to the dbx-tv block via the nrsw circuit. (4) mode discrimination stereo discrimination is performed by detecting the pilot signal amplitude. sap discrimination is performed by detecting the 5f h carrier amplitude. noise discrimination is performed by detecting the noise near 25khz after fm detection of sap signal. (5) dbx-tv block either the l r signal or sap signal input respectively from stin (pin 1) or sapin (pin 27) is selected by the mode control and input to the dbx-tv block. the input signal then passes through the fixed de-emphasis circuit and is applied to the variable de- emphasis circuit. the signal output from the variable de-emphasis circuit passes through an external capacitor and is applied to vca (voltage control amplifier). finally, the vca output is converted from a current to a voltage using an operational amplifier and then input to the matrix. the variable de-emphasis circuit transmittance and vca gain are respectively controlled by each of effective value detection circuits. each of the effective value detection circuits passes the input signal through a predetermined filter for weighting before the effective value of the weighted signal is detected to provide the control signal. (6) matrix the signals (l + r, l r, sap) input to matrix become the outputs for the st-l, st-r, mono and sap signals according to the mode control and whether there is st / sap discrimination. (7) others bias supplies the reference voltage and reference current to the other blocks. the current flowing to the resistor connecting iref (pin 5) with gnd become the reference current.
16 CXA2064M decoder output and mode control table input signal mode mono stereo mono & sap stereo & sap id pin dbx input output st sap m1 fomo hh l ? mute mute mute l r mute mute mute mute mute l r mute mute mute sap sap sap sap l r mute mute sap sap sap sap sap sap lch rch hh m ? l + r l + r hh h ? l + r l + r lh ll l + r l + r lh lm l r hh lh l + r l + r lh ml l + r l + r lh mm l + r l + r hh mh l + r l + r lh hl l + r l + r lh hm l r hh hh l + r l + r hl l ? l + r l + r hl m ? l + r l + r hl hl l + r sap hl hm sap sap hl hh l + r sap ll ll l + r sap ll lm l r hl lh l + r l + r ll ml l + r l + r ll mm l + r sap hl mh l + r sap ll hl l + r sap ll hm hl hh sap sap l + r sap l + r sap ? : don t care regarding st, sap, id l shows that drive current runs through load register and pin voltage is low. h shows that drive current doesn't run through load resistor and pin voltage is high.
17 CXA2064M h sap 4.5v to v cc 2 to 3v (or open) 0 to 0.5v 8.5v to v cc 3 to 7v 0 to 0.5v (or open) 3v to v cc 0 to 0.5v (or open) both stereo stid-h stid-l stid-l on off m l h m l h l limits of control voltage m1 fomo mute
18 CXA2064M application circuits shown are typical examples illustrating the operation of the devices. sony cannot assume responsibility fo r any problems arising out of the use of these circuits or for any infringement of third party patent and other right due to same . r7 3.9k r2 68k gnd c5 10 c11 10 tanta- lum metal 1% c7 5600p r5 1meg r6 100k c8 0.012 c14 4.7 c17 0.047 r8 5k c18 2700p r9 3.3k c15 3.3 tanta- lum 2 3 4 5 6 7 8 9 10 11 12 13 14 15 1 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 stin subout noisetc v cc iref gnd compin saptc vgr plint stid sapid pcint2 pcint1 mainout ve vewgt sapout sapin vetc veout vcain tvout-l tvout-r vcatc vcawgt mute m1 fomo mainin c6 1 c4 4.7 c2 4.7 v1 9v c3 4.7 r1 10k c1 4.7 c9 4.7 c16 4.7 c12 4.7 c13 4.7 v cc c10 1 r10 10k comp in stid r3 10k r4 10k v2 3 to v cc sapid mode control sw tvout-l tvout-r application circuit
19 CXA2064M input level vs. distortion characteristics 1 (mono) distortion [%] 1.0 0.1 10 0 10 input level vs. distortion characteristics 2 (stereo) distortion [%] 10 1.0 10 0 10 input level [db] input level vs. distortion characteristics 3 (sap) distortion [%] 10 1.0 10 0 10 input level [db] input level [db] input signal: mono (pre-emphasis on), 1khz 0db = 100% modulation level v cc = 9v, 30khz using lpf measurement point: tvout-l/r standard level (100%) input signal: stereo l = r (dbx-tvnr on), 1khz 0db = 100% modulation level v cc = 9v, 30khz using lpf, st mode measurement point: tvout-l/r standard level (100%) standard level (100%) input signal: sap (dbx-tvnr on) 1khz, 0db = 100% modulation level v cc = 9v, 30khz using lpf, sap mode measurement point: tvout-l/r
20 CXA2064M frequency [khz] gain [db] stereo lpf frequency characteristics 10 5 0 5 10 0 20406080100 30 10 0 20 50 12 5 102050 770100 40 30 10 20 gain (fc main and fc sub) [db] frequency [khz] main lpf and sub lpf frequency characteristics 10 0 20 20 40 60 80 100 120 10 20 sap frequency characteristics and group delay group delay [s] 100 90 80 70 60 50 40 10 20 0 30 5f h gain group delay 3.8f h 6.2f h frequency [khz] gain [db]
21 CXA2064M package outline unit: mm 0.45 0.1 1 1.27 15 7.6 0.1 + 0.3 10.3 0.4 16 30 18.8 0.1 + 0.4 0.2 m 0.1 0.2 0.05 + 0.1 0.5 0.2 0.1 0.05 a (9.3) 2.3 0.15 + 0.4 30pin sop(plastic) sony code eiaj code jedec code sop-30p-l03 sop030-p-0375 package material lead treatment lead material package mass epoxy resin solder plating copper alloy package structure 0.7g 0 to 10 + 0.2 detail a 0.45 0.1 1 1.27 15 7.6 0.1 + 0.3 10.3 0.4 16 30 18.8 0.1 + 0.4 0.2 m 0.1 0.2 0.05 + 0.1 0.5 0.2 0.1 0.05 a (9.3) 2.3 0.15 + 0.4 30pin sop(plastic) sony code eiaj code jedec code sop-30p-l03 sop030-p-0375 package material lead treatment lead material package mass epoxy resin solder plating copper alloy package structure 0.7g 0 to 10 + 0.2 detail a lead plating specifications item lead material copper alloy solder composition sn-bi bi:1-4wt% plating thickness 5-18 m spec. sct ass'y sony corporation

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